PDA16* – 160 MS/s, 16 bit, 2 Channel, PCI X, Xilinx Virtex-4 FPGA, Digitizer Board

*Note: Legacy Product Model

Recommended alternative product model - GaGe RazorPlus CSE5021

The PDA16 is a dual channel waveform capture board that provides a remarkable combination of high speed and high resolution sampling along with a very large memory capacity.  Signal frequencies up to 700 MHz can be accurately captured either in baseband or in higher order Nyquist zones using under-sampling techniques.

The PDA16 is a PCI/PCI-X 64-bit compatible board equipped with standard 'Plug and Play' features common in PCI systems.  The entire 512 MB memory may be used as an exceptionally large FIFO for acquiring data directly to either the SAB or PCI bus continuously non stop.  In either Buffered Acquisition Mode (where the 512 RAM FIFO is used) or Data Transfer Mode it is capable of sustaining 500 megabyte/sec transfers over the SAB and 640 megabyte/sec transfers over the PCI-X bus.  Significant test data has shown that recordings with this large FIFO buffering the recording process can be continuous at the card's full sampling rate even when operating in traditional non real-time environments such as the Windows operating system.

The Signatec Auxiliary Bus (SAB) allows for the high-speed transfer of data to fast processor boards, such as Signatec's PMP1000, or other peripherals, independent of the host PCI-X bus.  In addition to facilitating data transfers, the SAB can be used for operational control as well.

The PDA16 was designed to maximize the quality of the captured signal in terms of signal-to-noise ratio and spurious-free dynamic range over a very wide frequency range.  Six voltage ranges are implemented with full scale input levels from 267 mV to 2.5 volts with two of these ranges implementing a transformer coupled input direct to the ADC for best possible signal performance (2.5 V and 1.67 V).

A frequency synthesized clock allows the ADC sampling rate to be set to virtually any clock value up to 160 MHz, offering maximum flexibility for sampling rate selection.  This frequency selection flexibility comes at no cost to the acquisition clock quality/performance when locked to either the onboard 10 MHz, 5 PPM reference clock or to an externally provided 10 MHz reference clock.  The ADC may also be clocked from an external clock source.

Up to three PDA16 boards may be interconnected in a Master/Slave configuration via a ribbon cable that connects at the top of the board. In this configuration the clock and trigger signals from the Master drive the Slave boards so that data sampling on all boards occurs simultaneously.  The PDA16 supports single shot, segmented, and pretrigger triggering modes.

Signatec's PDA16 enables users to add customized signal processing into the output data flow via Xilinx® Virtex FPGAs with embedded PowerPC processors.  Standard development environments can be used to program for this device, such as Xilinx ISETM and System Generator with MATLAB software tools.  To accommodate its customers' varied performance requirements, Signatec designed the PDA16 to utilize the Virtex-4 FX20 (standard) or FX60 device, delivering a processing performance range from 19,224 logic cells/1,224 kbits block RAM/32 DSP slices/1 Power PC to 56,880 logic cells/4,176 kbits block RAM/128 DSP slices/2 Power PCs, respectively.  Processed data results can be sent to the PC or across the PDA16 SAB bus to other system devices, such as Signatec's parallel processing DSP board: PMP1000.

Product Specifications

Product: PDA16 Full Data Sheet
Update: Revision 1.04 - 04/03/2012
File Size: 1.08 MB

External Signal Connections
     Analog Input, Channel 1: SMA
     Analog Input, Channel 2: SMA
     Clock Input: SMA
     Trigger Input: SMA
     Digital Output: SMA
     Ethernet: RJ45
Analog Inputs
     Full Scale Voltage Ranges: 2.50V, 1.67V, 1.00V, 667mV, 400mV, 267mV
     Impedance: 50 ohms
     Bandwidth: 100 KHz to 700 MHz (with no LP filter)
     Coupling: AC
External Trigger
     Signal Type: digital, TTL signal level
     Impedance: >10k ohms
     Bandwidth: 50 MHz
Internal Synthesized Clock
     Frequency Range: 45.0 - 170 MHz
     Resolution: better than 5 PPM
     Accuracy: better than 5 PPM
     Unsettable Ranges: 128.9-129.8, 140.6-142.8, 154.7-158.7 MHz
External Clock
     Signal Type: sine wave or square wave
     Coupling: AC
     Impedance: 50 ohms
     Frequency: 10 MHz to 160 MHz
     Amplitude: 100 mV p-p to 2.0 V p-p
Post ADC Clock Divider
     Divider Settings: 1, 2, 4, 8, 16, 32
Reference Clock
     Internal: 10.0 MHz, +/- 5 ppm max.
     External: 10.0 MHz, +/- 50 ppm max (required for lock)
Digital Output
     Type: TTL Logic Level
     Max. Frequency: 160 MHz
     Suggested Load: 1k ohms
     Resolution: 16 bits
     Aperture Jitter: 0.07 pS typical
     Clock Rate: 1.0 to 160 MHz
Trigger Modes
     Post Trigger: single start trigger fills active memory
     Pre-Trigger: single trigger stops acquisition
     Segmented: start trigger for each memory segment
Trigger Options
     Pre-Trigger Samples: samples prior to trigger are stored; Single Channel: 8k max.; Dual Channel: 4k max per channel
     Delayed Trigger: delay from trigger to data storage; Up to 64k digitizer clock cycles
     Active Size: Up to 256 Megasamples
     Segment Size: Up to 128 Megasamples
     Segment Re-Arm Time: 150 nanoseconds
     Addressing: DMA transfers from starting address
I/O Addressing
     PCI Controller Address: 64 bytes, Plug and Play selected
     Control/Status Registers: 32 bytes, Plug and Play selected
Signatec Auxiliary Bus
     Data Transfer Modes: Block
     Data Transfer Rates: Up to 640 MB/s max @ 64 bits
     Data Direction: Output only
Power Requirements
     +12V: 400 mAmps max.
     +5V: 1.5 Amps max.
     +3.3V: 2.3 Amps max.
Absolute Maximum Ratings
     Analog Inputs: 5 volts peak to peak
     Trigger Inputs: -0.2 to +4.0 volts DC
     Clock Input: 5 volts peak to peak
     Ambient Temperature: 0 to 50C